Welcome to International Journal of Emerging Technologies in Engineering Research (IJETER)

Volume 8, Issue 7, July (2020)

S.No	Title & Authors	Full Text
1	Health Data Security: A Privacy-Preserving Proposed Strategy for Bangladesh A K M Bahalul Haque, Tahmid Hasan Pranto Abstract - Patient’s data are too personal and sensitive that a person may never want to disclose. So, maintaining the privacy of these data and ensuring proper security and protection measurements should be given paramount importance. Many countries across the world, force the hospitals and healthcare organizations to maintain all this by imposing data privacy laws where many countries have specific laws or acts only for healthcare data. Bangladesh lacks a data protection law let alone healthcare data law that should have been already imposed as there is a clear need for that. In this paper we analyzed the healthcare situation of Bangladesh and prepared a threat model specialized for hospital or healthcare organizations. We proposed a strategy to address healthcare data security that starts with patient data collection and covers storage strategies, data flow architecture, data process mechanism and level of authority of data owners. We also proposed a chain of maintenance through continual testing and auditing. All these strategies and security measurements can be added to legislation for ensuring privacy, protection and security of healthcare data.	Download
2	Design and Development of Burden Lenient Network On-Chip Using FPGA S. Ravichandran Abstract - This Network on-chip (NoC) stands a novel structuring correspondence convention. It makes a correspondence between the on-chip centers. It has been proposed as one of the interconnect answers for future System on-chip (SoCs). This paper presents a disengaged/online concurrent compass based verifiable individual test (check BIST) methodology for a Network-on Chip (NoC). The proposed designing contains a special yield cell and an Embedded Test Core (ETC) as its test source. The ETC plays out a static stream control and a determined typical power use control during the proposed test instrument. This shows the arranging and execution of a totally special pipeline circuit-changed change to help ensured throughput. The circuit-traded switch, supported a backtracking testing way course of action, works by an upwelling-facilitated trend-pipeline method. This control can reinforce a numb and live-latch gratis one of a kind way arrangement conspire and can accomplish high transmission capacity, high territory and vitality productivity. The proposed BIST strategy empowers fast go/off limits BIST, with minor additional region inside the NoC itself. Chip configuration is turning out to be progressively correspondence bound rather than calculation bound. In this paper the test planning issue is likewise tended to for such NoC-based SoCs. We acknowledge a crossbreed BIST approach, where test sets of individual focuses are made out of pseudorandom and deterministic test courses of action and, instead of various other arranging moves close, not treated as mystery components. This work likewise presents two more procedure called N-identify test unwinding and half and half calculation to improve the presentation of the framework.	Download